Functions comparing circuit

ABSTRACT

The circuit comprises first and second counters, each adapted to receive pulses representative of remote occurrences, and a gate circuit between the counters, the interconnections being such that the gate circuit permits no output pulse to be provided when a predetermined relationship exists between the counters and permits an output pulse to be transmitted when the predetermined relationship is disturbed.

United States Patent Locke 1 June 6, 1972 s41 FUNCTIONS COMPARING CIRCUIT 3,151,236 9/1964 Beaurne .307/224 x 3,016,490 l/1962 Petriw ....328/l58 X lnvemorgam will! Nmh Plamfield, 3,307,174 2/1967 Klinkowski ....307/242 x 3,143,668 8/1964 Bloodworth et a1. ....307/242 [73] Assignee: Burroughs Corporation, Detroit, Mich. 3,283,176 11/1966 Gilliland et a1. ..307/243 3,305,726 2/1967 Goodman et al ..307/242 X [22] Filed: Oct. 23, 1970 [21] APPLNOJ 83,514 Primary Examiner-Stanley'l. Krawczewicz Attorney-Kenneth L. Miller, Robert A. Green, George L. Kensinger and Charles S. Hall [52] US. Cl ..307/243, 246/77, 246/249,

307/224, 307/231, 328/97, 328/154 [57] ABSTRACT [51] Int.Cl. H031: 17/60 58 Field 6: Search ..307/224, 231, 232, 242, 243; The and each adapged 328/42 96 97 104 6 147 154 246/77 to receive pulses representative of remote occurrences, and a gate circuit between the counters, the interconnections being such that the gate circuit pennits no output pulse to be pro- [56] References cued vided when a predetermined relationship exists between the counters and pennits an output pulse to be transmitted when UNITED STATES PATENTS the predetermined relationship is disturbed.

3,237,027 2/1966 Deye ..328/97 x Y 3cm, 1 Drawing figure b p g i i= 5 3 E= i= i= i= 7 I I O A 60C 60E 7% 7w 60B D "()8 70A 70C 70E IIOC I30 IIOE 2 E i 120 I 0 COUNTER i COUNTER PULSE 3Q PULSE 5O SOURCE JON SOURCE PATENTEIJJIIII 6 I972 3, 668,431

l g g g IIOA g l I g 60A 90c 90E W705 700 60B 900 HOB 70A 70c 70E IIoc I20 I30 HOD I20 I30 I* a I20 I0 I Q7 1 4 3 2 I 0 44 4 3 2 I 0 COUNTER \20 M COUNTER PULSE /3o PULSE 50 SOURCE loo SOURCE OUT INVENTUR.

GEORGE W. LOCKE BY a) ATTORNEY FUNCTIONS COMPARING CIRCUIT BACKGROUND OF THE INVENTION the machine would become jammed. The prior art provides no simple, convenient circuit for providing protection for this type of operating problem.

DESCRIPTION OF THE DRAMNG The single FIGURE is a schematic representative of a cir cuit embodying the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT A circuit embodying the invention includes a first ring counter 20 having its input capacitively coupled to a pulse source 30 adapted to transmit a pulse to the counter every time a particular occurrence takes place. The circuit 10 includes a second ring counter 40 having its input capacitively coupled to a pulse source 50 which also provides an input pulse to the counter each time a particular occurrence takes place. It is understood that the two occurrences are related, and they may be, for example in the first case, the feeding of paper into a printing machine, with the entry of each sheet generating a pulse, and in the second case, the feeding of paper from the machine, with each sheet fed transmitting a pulse.

For purposes of illustration, it is assumed that each counter includes five positions, each being connected through a resistive path 60 (counter 20) and 70 (counter 40) to a common bus 80. The bus 80 is also connected through a resistor and a lead 90 to an output terminal 100. Each lead 60 from the first counter 20 is connected to the base of a transistor 110, the collector of which is connected to the lead 90, and the emitter of which is connected through a diode 120 and a resistor 130 to an output lead 70 from the second counter 40.

With the circuit shown, no output pulse appears on lead 90 unless the two counters are four counts apart. In operation of the circuit 10, as each input pulse from source 30 operates counter 20, the energized position applies a generally negative potential on its lead 60, and all of the other leads 60 are at a generally positive potential. Thus, positive potential is applied to the base electrodes of all but one transistor 110. At the same time, one of the positions in counter 40 is energized, its lead 70 is at a low potential, and all of the other leads are at high potential. This low potential is applied to the emitter of one of the transistors having positive potential at its base, and this transistor turns on and maintains lead 90 at a relatively low potential. Thus, no output pulse appears at terminal 100. Assume, for example, that the 0 positions in counters 20 and 40 are energized. With this arrangement, lead 60A of position 4 in counter 20 applies a positive potential to transistor 110E, and lead 70E at the 0 position in counter 40 applies a generally negative potential to the emitter of transistor 110E, and this transistor turns on. If each counter receives counts sequentially, then each of the transistors turns on in turn and lead is maintained at low potential. If, however, with transistor E on, with the 0" positions both energized in the counters, only counter 20 receives pulses, then transistor 110E remains on until counter 20 reaches position 4, at which time lead 60A falls to a low potential, transistor 110E is turned off, lead 90 rises in potential, and a positive output pulse appears at terminal 100. This output pulse can be used to provide a control action, for example, disabling of the overall apparatus.

Preferably the input signals from he pulse sources 30 and 50 to the counters 20 and 40 should be AC coupled and should be negative pulses to insure proper potential on lead 42 into the counter 40 for operation of the transistors 1 l0 and output lead 90. Diode 44 also assists in this operation.

What is claimed is:

1. Functions comparin circuit comprising a first counter and a rrst pulse source a apted to transmit pulses to said first counter,

a first output lead from each position of each said first counter, a second counter and a second pulse source adapted to transmit pulses to said second counter,

a second output lead from each position of each said second counter,

said pulse sources in normal operation being adapted to transmit pulses to their respective counters,

a signal output terminal, and

a plurality of switching devices, all connected to said output terminal, said switching devices being connected between selected ones of said first output leads and selected ones of said second output leads, the arrangement being such that one position in each counter is energized at any instant and the potentials on the first and second output leads not associated with these positions insure that one switching device is ON and no output signal appears at said output terminal, however, when the energized position in each counter is associated with the same switching device, any switching device which is ON is turned OFF and an output signal appears on said output terminal.

2. The circuit defined in claim 1 wherein each switching device has first and second control electrodes, each first control electrode being connected to one of said first output leads and each second control electrode being connected to one of said second output leads.

3. The circuit defined in claim 2 wherein each switching device is a transistor, said first control electrode is the base of the transistor and said second control electrode is the emitter of the transistor. 

1. Functions comparing circuit comprising a first counter and a first pulse source adapted to transmit pulses to said first counter, a first output lead from each position of each said first counter, a second counter and a second pulse source adapted to transmit pulses to said second counter, a second output lead from each position of each said second counter, said pulse sources in normal operation being adapted to transmit pulses to their respective counters, a signal output terminal, and a plurality of switching devices, all connected to said output terminal, said switching devices being connected between selected ones of said first output leads and selected ones of said second output leads, the arrangement being such that one position in each counter is energized at any instant and the potentials on the first and second output leads not associated with these positions insure that one switching device is ON and no output signal appears at said output terminal, however, when the energized position in each counter is associated with the same switching device, any switching device which is ON is turned OFF and an output signal appears on said output terminal.
 2. The circuit defined in claim 1 wherein each switching device has first and second control electrodes, each first control electrode being connected to one of said first output leads and each second control electrode being connected to one of said second output leads.
 3. The circuit defined in claim 2 wherein each switching device is a transistor, said first control electrode is the base of the transistor and said second control electrode is the emitter of the transistor. 